Principal Layout Designer

  • Edinburgh, City of Edinburgh, Scotland
  • Market related

Senior Layout Engineer / Designer to implement & design layout tools and processes. Supporting engineers and physical design engineers, looking at possible improvements, providing input into block/chip level project schedules. Promote layout improvements. You will resolve day to day loading and technical issues from block to chip level layoutm investigate & resolve complex layout issues & provide solutions. You will provide layout support from transistor to chip level delivery, responsible for the identification of possible issues in transistor / block and system level layout, promote layout verification flows and procedures, competent in all aspects of layout design. You will provide detailed plans for block level layout for review by more senior physical design engineers. Experience in submicron to very deep submicron technologies, block / sub system verification and sign off including DRC, ERC, LVS flows. You will have experience in several of the following;

  • CHIP/block level floor planning, PAD and ESD considerations, Charge pumps, Power switches, ADC’s, DAC’s, Headphone and Speaker layout. RDL/BALLOUT design and layout, along with foundry data transfer, verification and sign off of job deck views